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[Other resource] simple_fifo

Description: verilog HDL原码 一种简单的同步FIFO原码，可以被综合-verilog HDL original code a simple synchronous FIFO original code, which can be integrated
Platform: | Size: 1467 | Author: zxz | Hits:

[Other resource] syn_fifo

Description: 同步FIFO的verilog编码 -synchronous FIFO verilog coding synchronous FIFO verilog Synchronous Code FI FOR the verilog coding synchronous FIFO verilog coding
Platform: | Size: 1217 | Author: garfee | Hits:

[VHDL-FPGA-Verilog] generic_fifo

Description: 这是从opencores下的fifo代码,包括了异步和同步的,还有写的testbench,希望对大家有用.-This is opencores fifo under the code, including asynchronous and synchronous. There testbench written in the hope that useful for all.
Platform: | Size: 20480 | Author: daiowen | Hits:

[VHDL-FPGA-Verilog] simple_fifo

Description: verilog HDL原码 一种简单的同步FIFO原码，可以被综合-verilog HDL original code a simple synchronous FIFO original code, which can be integrated
Platform: | Size: 1024 | Author: zxz | Hits:

[VHDL-FPGA-Verilog] syn_fifo

Description: 同步FIFO的verilog编码 -synchronous FIFO verilog coding synchronous FIFO verilog Synchronous Code FI FOR the verilog coding synchronous FIFO verilog coding
Platform: | Size: 1024 | Author: | Hits:

[ARM-PowerPC-ColdFire-MIPS] FIFO_Buffer

Description: 同步及异步时序电路fifo源程序及其测试程序.rar - fifo源程序，erilog编写~具有较强的参考价值~ -Synchronous and asynchronous sequential circuits fifo source and test procedures. Rar- fifo source, erilog prepared ~ has a strong reference to the value of ~
Platform: | Size: 69632 | Author: 张勇奇 | Hits:

[VHDL-FPGA-Verilog] FIFO_Syn

Description:
Platform: | Size: 25600 | Author: shenyunfei | Hits:

[VHDL-FPGA-Verilog] s_fifo

Description: 一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard memory chip for storage.两种方式,包含testbench-Verilog language describes a synchronous fifo, including: Fifo using declared registers for storage and Fifo using (model of) standard memory chip for storage. In two ways, including Testbench
Platform: | Size: 2048 | Author: 彭帅 | Hits:

[VHDL-FPGA-Verilog] FIFO_2

Description: VERILOG Synchronous FIFO. 4 x 16 bit words.-VERILOGSynchronous FIFO. 4 x 16 bit words.
Platform: | Size: 2048 | Author: likui | Hits:

[VHDL-FPGA-Verilog] FPGA_FIFO

Description: 使用Verilog编写的同步FIFO，可通过设置程序中的DEPTH设置FIFO的深度，FIFO_WRITE_CLOCK上升沿向FIFO中写入数据， FIFO_READ_CLOCK上升沿读取数据。本程序对FIFO上层操作简单实用。-Prepared by the use of Verilog synchronous FIFO, through the setup program in the FIFO depth DEPTH settings, FIFO_WRITE_CLOCK rising edge to the FIFO write data, FIFO_READ_CLOCK rising edge of read data. This procedure on the upper FIFO operation simple and practical.
Platform: | Size: 1024 | Author: 张键 | Hits:

[VHDL-FPGA-Verilog] syn_fifo

Description: A Verilog description of a synchronous FIFO memory circuit
Platform: | Size: 1024 | Author: balloo | Hits:

[VHDL-FPGA-Verilog] asymmetric_fifo

Description: 高速同步非对称FIFO,verilog 代码，很有价值的参考设计。-Asymmetric high-speed synchronous FIFO, verilog code, and very valuable reference design.
Platform: | Size: 11264 | Author: claud | Hits:

[VHDL-FPGA-Verilog] FifoAndTestbench

Description: 这是一个verilog编写的同步fifo和testbench的设计-It is a synchronous fifo and testbench design with verilog
Platform: | Size: 2048 | Author: 王强 | Hits:

[VHDL-FPGA-Verilog] NANDFlashcontrolandFIFOcontrol

Description: 实现NAND Flash块的控制存取以及同步的FIFO的控制 verilog 代码-NAND Flash control access and control of the synchronous FIFO verilog code
Platform: | Size: 6144 | Author: alliance | Hits:

[Other] fifo

Description: 同步fifo的verilog代码，很好的资料，值得学习-Synchronous fifo verilog code, very good information, it is worth learning
Platform: | Size: 1024 | Author: 李军 | Hits:

[VHDL-FPGA-Verilog] synchronous-FIFO

Description: 同步fifo的使用verilog案例讲解-The use of synchronous fifo verilog case to explain
Platform: | Size: 265216 | Author: Ande | Hits:

[VHDL-FPGA-Verilog] Synchronous-FIFO-

Description: 一个用verilog实现的同步fifo设计，压缩包里有word介绍设计中各信号的作用-Achieve a synchronous fifo with verilog design, compression bag has the role of word describes the design of the signals
Platform: | Size: 120832 | Author: csy | Hits:

[VHDL-FPGA-Verilog] syn_fifo

Description: 该源码包是同步fifo的Verilog语言模型，主要包括2个部分：同步fifo控制模块、测试文件。(The source package is a synchronous FIFO Verilog language model, including 2 main parts: synchronous FIFO control module, test files.)
Platform: | Size: 1024 | Author: 叶古 | Hits:

[VHDL-FPGA-Verilog] 异步FIFO

Description: 自己编写的同步和异步FIFO的verilog代码，验证过，有可靠性(Verilog code of my own synchronous and asynchronous FIFO, verified,and reliable.)
Platform: | Size: 2048 | Author: 大黄黄黄 | Hits:

[VHDL-FPGA-Verilog] verilog实例 [43项]

Description: 一些采用verilog描述的数字功能模块，有常见的同步异步FIFO，RAM等模块，适合新手学习(Some digital function modules described by Verilog, such as synchronous asynchronous FIFO and ram, are suitable for novice learning)
Platform: | Size: 190464 | Author: hayto | Hits:
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